Xilinx Field Programmable Gate Array, Part #: XC2S30-5VQG100I | FPGA | DEX Box of 50 Backward compatible to VDD =

Backward compatible to VDD = VDDQ = 1

Internal reference clock with trim adjustment (trimmed at factory

20 MHz clock input DC

Part# 4522-150-40461

Xilinx Field Programmable Gate Array, Part #: XC2S30-5VQG100I | FPGA | DEX Box of 50 Backward compatible to VDD =The Xilinx XC2S30 5VQG100I Spartan 3 family of Field Programmable Gate Arrays is specifically designed to meet the needs of high volume, cost sensitive consumer electronic applications. The eight member family offers densities ranging from 50,000 to 5,000,000 system gates Features Low cost, high performance logic solution for high volume, consumer oriented applications Densities up to 74,880 logic cells SelectIO interface signaling Up to 633 I O pins